Posts: 1
Registered: ‎09-27-2017

Si545 output impedance

I am considering the Si545 in the CMOS configuration in a design I am working on.  I am wondering about the impedance of the output when it is disabled.  Does it go high impedance?  Or just to a static state?


While I'm at it.  What is the active output impedance?


Thanks in advance.

Posts: 45
Registered: ‎06-16-2014

Re: Si545 output impedance

1) When disabled via OE deassertion, the output goes Hi-Z (high impedance).

2) The output impedance for LVCMOS output format is about 35 ohms. We recommend a 10 ohm series resistor to dampen the effects of signal reflections when using 50 ohm impedance rules for PCB layout of clock traces.