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Posts: 2
Registered: ‎01-04-2017
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SI5351 MSOP10 package XA used as clock input frequency

Hello,

 

I'm looking at clock builder, and the register map.  I cannot see the reason why Clock Builder insists that XA (crystal) must be between 25MHz and 27MHz.  BTW, the datasheet says -ether- 25MHz or 27MHz.  Is there any reason for this range specification?  Is it related (for instance) to internal startup?

 

Specifically, I need to use a 10MHz OCXO (sinewave) input to XA.  Is it a question of the PLL not locking on power up, simply corrected once the registers are set correctly through I2C, or is there some other issue I should be aware of.

 

D.

Posts: 59
Registered: ‎09-10-2014

Re: SI5351 MSOP10 package XA used as clock input frequency

Hi,

 

The XA/XB pin is connected to an internal crystal oscillator which operates ONLY in the 25-27 MHz range.

 

If you want to use a OCXO, the best choice is to use a Si5351C but that part is not available in the 10 pin MSOP package but available in the 20-pin QFN package. The 20-pin package is actually about the "same area" on the PCB. Given this, will you be able to consider the Si5351C variant instead?

 

Regards,

Hari

Posts: 59
Registered: ‎09-10-2014

Re: SI5351 MSOP10 package XA used as clock input frequency

Hi,

 

The XA/XB pin is connected to an internal crystal oscillator which operates ONLY in the 25-27 MHz range.

 

If you want to use a OCXO, the best choice is to use a Si5351C but that part is not available in the 10 pin MSOP package but available in the 20-pin QFN package. The 20-pin package is actually about the "same area" on the PCB. Given this, will you be able to consider the Si5351C variant instead?

 

Regards,

Hari

Posts: 2
Registered: ‎01-04-2017

Re: SI5351 MSOP10 package XA used as clock input frequency

"The XA/XB pin is connected to an internal crystal oscillator which operates ONLY in the 25-27 MHz range."

 

Really?  Hard to imagine how, since I would assume that the input is a simple Pierce oscillator, with the frequency determining components (crystal resonator) outside.  I suppose it is possible that the internal (perhaps clever and synthetic?) load capacitors somehow introduce unexpected frequency dependent effects...

 

I will set the internal multiplexor to connect the crystal input directly through to an output (bypassing the PLL) and measure input amplitude sensitivity vs frequency (when I get time) and post the results.

Posts: 59
Registered: ‎09-10-2014

Re: SI5351 MSOP10 package XA used as clock input frequency

That is fine. The issue is not that for a "given" part if the internal oscillator operates for any given frequency range. The issue is if we (Silicon Labs) can guarantee the spec over process , voltage and temperature and based on that, we have specified it as such.

 

There is always an alternate of using just the CLKIN pin which just has an input buffer and it is your choice to pursue either option.

 

 

<a href="http://community.silabs.com/t5/Welcome-and-Announcements/Community-Ranking-System-and-Recognition-Program/m-p/140490#U140490"><font color="#000000"><font size="2">Hero</font></font> </a> jmg
Posts: 1,076
Registered: ‎04-27-2004

Re: SI5351 MSOP10 package XA used as clock input frequency


I will set the internal multiplexor to connect the crystal input directly through to an output (bypassing the PLL) and measure input amplitude sensitivity vs frequency (when I get time) and post the results.


Be interested in your results.

 

You can AC couple a Clipped Sine into the Xtal Buffer, and there is a spec somewhere about an upper limit on the swing. 

 

 Can you get a 20MHz or 24MHz OCXO ? - that may be closer to the test range SiLabs use.

 

 

 I have asked SiLabs to fix the software limitations on their Clock Builder, but the wheels turn slowly.

I was told it was coming. I also suggested they test and qualify parts for Clipped Sine drive, but it takes  a while for the SiLabs gears to turn, and grasp there really is a market for that use.

 Clipped Sine VCTCXOs are driven down in price by GPS volumes, and can now come for 62c in modest volumes.

 

Other vendors specify the valid range of PFD and VCO, which are what really limits any PLL.

Everything else is digital dividers.