Si53314 FAQ

by <a href=""><font color="#000000"><font size="2">Hero Employee</font></font> </a> FranBoudreau on ‎06-09-2017 07:37 AM
  • Can the Si53314 VDD0A or VDD0B be left open to save power on an unused output bank?

The VDD0A or VDD0B should be set to GND if an output bank is unused, an entire bank can be unpowered to save current.



  • How should the Si53314 unused clock inputs be terminated, should they be set to ground?

An unused clock input pair should be left open. The Si53314 has an anti-chatter input specifically designed for this application; if there is no input the outputs will not chatter due to noise injected on the unused clock input.  



  • How should the Si53314 unused clock outputs be terminated?

Unused clock outputs can be left open if there is no PC trace length. If there is an output trace then standard termination can be used to reduce reflections and noise, e.g. a 100 ohm resistor is placed at the “receiver” end of an LVDS output. Note: Differential outputs should be terminated in a like manner, e.g. if one output is used the other should not float and should be terminated in a like manner.



  • Can the Si53314 input be a pulse, data, spread spectrum or non-periodic clock inputs?

The input can be a pulse input, data, spread spectrum or a non-periodic clock input. There is no AC coupling nor ZDM PLL inside the Si53314, the output switches upon clock input switching (meeting the data sheet VCM and threshold criteria).



  • Are the Si53314 CMOS outputs in-phase or complementary?

The CMOS outputs are in-phase between outputs and between banks.



  • How should the Si53314 OE, output enable, be treated?

The OE has an internal 25 Kohm pull-up resistor and can be unterminated for active outputs. An additional pull-up resistor, such as 1K, can also be used. However, for troubleshooting purposes it may be desirable to enable and disable the outputs using the OE feature - in this case OE would terminated to GND through a resistor such as 1 Kohm.



  • How should the Si53314 SFOUTA1/0 and SFOUTB1/0 be treated?

The SFOUT pins have internal 25 kohm pull-up and pull-down resistors, setting an internal bias to VDD/2. For midstate level the SFOUT pins would be left open. A smaller resistor, such as 1K or lower, should be used when terminating SFOUT to VDD or GND – a 10 Kohm pull-up or pull-down may not achieve the appropriate logic levels. 



  • How should the Si53314 CLKSEL be treated?

The CLKSEL has an internal 25 Kohm pull-down resistor which selects CLK0 inputs when left open. CLKSEL requires a logic high to select CLK1, such as a 1K pull-up or smaller value, to VDD.