External EPCA/PCA Input (ECI) Synchronization

by <a href="http://community.silabs.com/t5/Welcome-and-Announcements/Community-Ranking-System-and-Recognition-Program/m-p/140490#U140490"><font color="#000000"><font size="2">Hero Employee</font></font> </a> Silicon_Labs on ‎11-24-2014 08:43 AM


What is the maximum clock rate for the ECI EPCA/PCA input?



When the external clock input (ECI) is selected as the EPCA clock source, the clock divider decrements on falling edges or both rising and falling edges of the pin. The ECI pin is synchronized to the selected AHB clock in this mode. The maximum clock rate for the ECI external clock input is the APB divided by 4.