Reply
Highlighted
Posts: 11
Registered: ‎03-07-2017

Si4432 FIFO not being written

Hello everyone.

   I have been trying to write the Si4432 FIFO to transmit data. All other registers are being written and being read. But unfortunately, I am not getting a hang of how to write the si4432 FIFO. Upon reading the FIFO register 7F, I am getting 0x12 in return.

 

    Also upon writing 0x09 to Register 0x07, the module is not going into Tx mode and upon reading status register 0x02, it reads 0x21(0x20 | 0x01 where 0x01 is for Rx Mode).

 

I think I am making some mistake. Can anybody please help?

 

Regards,

Keyshav

Posts: 208
Registered: ‎12-10-2013

Re: Si4432 FIFO not being written

TX FIFO is not readable. You can only write the data into FIFO without verification.
RX FIFO can only have valid data after a packet is received. If there is no packet received, you may get random data or initial value.

Ho did you decide that Tx is not successful? Since a packet may be short, the time in Tx state may be short. Maybe you can monitor the current consumption of the chip/board to decide whether there is ever Tx operation.

Thanks,
Juanyong
Posts: 208
Registered: ‎12-10-2013

Re: Si4432 FIFO not being written

TX FIFO is not readable. You can only write the data into FIFO without verification.
RX FIFO can only have valid data after a packet is received. If there is no packet received, you may get random data or initial value.

Ho did you decide that Tx is not successful? Since a packet may be short, the time in Tx state may be short. Maybe you can monitor the current consumption of the chip/board to decide whether there is ever Tx operation.

Thanks,
Juanyong