Si4x6x-C2A, Si4x55-C2A startup sequence

by <a href="http://community.silabs.com/t5/Welcome-and-Announcements/Community-Ranking-System-and-Recognition-Program/m-p/140490#U140490"><font color="#000000"><font size="2">Hero Employee</font></font> </a> tanagy on ‎04-06-2017 09:32 AM

              In the Si4x6x chips there is a timeout after POR built-in to make sure if there is no host activity (SPI comms), the chip would go back to inactive state saving energy. Inactive state is the state the chip is sitting in after POR.

              Because of this time-out, some refinement is necessary on the recommended startup sequence of AN633, as follows:

             

  1. Assert SDN
  2. Wait at least 10us
  3. Deassert SDN
  4. Wait at least 14ms or until GPIO1(CTS) goes  HIGH
  5. Issue the POWER_UP command over SPI (or send first line of patch if applied)

              This first SPI transaction has to take less than 4ms (NSEL LOW time). If it cannot be guaranteed, send a shorter command (e.g. NOP) first, check CTS, then send POWER_UP or patch.