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08-18-2014 09:46 AM - last edited on 09-30-2015 03:01 AM by Siliconlabs
For the Si823x series for isolated gate drives, all the references show the upper channel biasing to be of the boot-strap type and uni-polar.
Could the VDDA and GNDA actually be configured such that if, for example, a +15V/-5V bi-polar type biasing be fed into the chip and the source/emitter return of the device connected to separate neutral point?
Or a different way could be that a 20V supply be placed between those pins, then using a secondary zener diode with resistors and capacitors create a +15V/-5V gate biasing ckt w/ a derived, floating source/emitter return point.
Is there anything in the chip itself that would prevent negative biasing or reverse current flow?
11-04-2014 04:56 PM - edited 11-05-2014 03:07 PM
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