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Posts: 2
Registered: ‎02-27-2017

SI8662 power sequence

Hello,

 

Will damage occur to the device if the isolated side "VDD2" remains un-powered while the non-isolated side is powered?

 

If VDD2 is powered at some time later, will the device still operate correctly?

 

Regards

Posts: 8
Registered: ‎02-26-2016

Re: SI8662 power sequence

The answer is NO.  The two sides ( primary side with VDD1,  secondary side with VDD2) are totally independent.  

Posts: 2
Registered: ‎02-27-2017

Re: SI8662 power sequence

Kevin,

 

How is the isolation in the device achieved?

Your replied "NO" would be for the first or second question?

Can the device be damaged if one of its output pin is driven low or high?

 

Regards

 

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Posts: 8
Registered: ‎02-26-2016

Re: SI8662 power sequence

How is the isolation in the device achieved?

[KH] Please refer to the paper, http://www.silabs.com/documents/public/white-papers/CMOS-Digital-Isolators-WP.pdf 

 

Can the device be damaged if one of its output pin is driven low or high?

[KH] The common voltage between GND1 and GND2 can be up to thousands voltage.  You can treat primary side as one chip and secondary side as another chip.   All the I/O pins at primary side must be within ( GND1-0.5V, VDD1+0.5V) ;  All the I/O pins at secondary side must be within ( GND2-0.5V, VDD2+0.5V),  and VDD1 to GND1 or VDD2 to GND2 must be below 5.5V.  After that, you will be ok.