CP2112 Clock Period

by <a href="http://community.silabs.com/t5/Welcome-and-Announcements/Community-Ranking-System-and-Recognition-Program/m-p/140490#U140490"><font color="#000000"><font size="2">Hero Employee</font></font> </a> yucheng on ‎12-21-2016 09:49 AM


What is the tHIGH and tLOW period for the CP2112?


The clock high period (tHIGH) is typically twice as large as the clock low period (tLOW) for the CP2112.


The CP2112's SMBus I/O interface is a two-wire, bi-directional serial bus. The SMBus is compliant with the System Management Bus Specification, version 1.1, and compatible with the I2C serial bus.