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Posts: 9
Registered: ‎03-03-2017
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C8051F5XX: Clearing the Receive FIFO

The datasheet for the C8051F56X family of devices mentions that the UART's receive includes a 3-deep FIFO.

 

It mentions the following as well:

  • [...] Reads of SBUF0 always access the first byte of the Receive FIFO; [...]
  • [...] If additional bytes are available in the Receive FIFO, the RI0 bit cannot be cleared by software.

 

How can I guarantee that I have taken all elements out of the FIFO? Can I do a loop within its interrupt and keep pulling data? When does the data from the FIFO become available to read?

Posts: 7,925
Registered: ‎08-13-2003

Re: C8051F5XX: Clearing the Receive FIFO

[ Edited ]
  • [...] If additional bytes are available in the Receive FIFO, the RI0 bit cannot be cleared by software.

 

How can I guarantee that I have taken all elements out of the FIFO?

if RI0 will clear, see above

 

Can I do a loop within its interrupt and keep pulling data?

yes and no, if you just store it in an array, yes, if you process in the ISR (BTW rarely a good idea) you may run into KISS trouble

 

When does the data from the FIFO become available to read?

when stored in the FIFO

erik
Posts: 9
Registered: ‎03-03-2017

Re: C8051F5XX: Clearing the Receive FIFO

Alright, so if I understand correctly:

 

To check whether there's more data:

  • Attempt to clear that bit, and check to see if it is indeed cleared. Cleared = no more data.

To empty out the FIFO:

UART_ISR()
{
[...]

// Grab all data from FIFO
while(FIFO_not_empty) { buf[pos] = (UART Data Register) pos+=1 }
}

Is this correct?

 

I don't understand the last part about processing it in the ISR possibly causing KISS trouble. Can you elaborate?

 

Posts: 7,925
Registered: ‎08-13-2003

Re: C8051F5XX: Clearing the Receive FIFO

[ Edited ]

 

I cant comment based on the skimpy above what is 
FIFO_not_empty
and where is the test and clear RI


something like
while (RI)
{
my_array(index) = SBUF;
index++;
RI =0;
}
should do it

 

 

KISS: Keep ISRs Short and Simple 

erik
Highlighted
Posts: 9
Registered: ‎03-03-2017

Re: C8051F5XX: Clearing the Receive FIFO

I just abstracted that code a bit to highlight the structure. 

But grabbing them all within the same interrupt is feasible.