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Posts: 25
Registered: ‎03-03-2017
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C8051F568: SMBus R/W bit importance

I've been playing around with the SMBus example, and tried to do something that I thought would work, but it did not behave as I expected it to be.

 

The example SMBus code illustrates the sending of the slave address as two parts: pushing the 7-bit address to SMB0DAT, followed by pushing the R/W bit as a separate instruction.

 

I attempted to keep the slave address in a total of 8 bits, including its R/W bit, and sent it to the slave. The Multibyte Master-Slave code pairs stopped blinking their LEDs when this modified code was flashed.

 

My pure speculation is that hardware expects the 8th bit to exist, whether or not the original write already factored it in. Due to the nature of the shift-out-shift-in behavior, this would cause the original transmitted data to be off-shifted by one when transmitting, causing the LEDs to no longer toggle as the data wouldn't match up anymore (among possibly other things behind the scenes).

 

Alternatively, while I'm skeptical of this, I did do minor modifications to the example code, so there's a chance my minor changes impacted functionality of the code when I tested this.

 

So my question is this:

 

If my 7-bit slave addresses already factor in the R/W bit as its LSB (making the address sent a total of 8 bits), can I do this in just one step of sending to SMB0DAT? Or does the SMBus hardware expect a separate instruction to pass in the R/W bit to SMB0DAT?

Posts: 8,022
Registered: ‎08-13-2003

Re: C8051F568: SMBus R/W bit importance

If my 7-bit slave addresses already factor in the R/W bit as its LSB (making the address sent a total of 8 bits), can I do this in just one step of sending to SMB0DAT? Or does the SMBus hardware expect a separate instruction to pass in the R/W bit to SMB0DAT?

 

the hardware 'expect' 8 bits

I2C Specification: http://www.nxp.com/documents/user_manual/UM10204.p​df

 

 

erik
Posts: 25
Registered: ‎03-03-2017

Re: C8051F568: SMBus R/W bit importance

I may not have been clear; I'm trying to find a better way to phrase this.

 

I know what my slave address is, which is a total of 7 bits.

I am more or less appending the r/w bit at the end, determining the resulting 8-bit hex number, and storing that in memory.

 

I then write the 8-bit number as the slave address to SMB0DAT, and have commented out the masking and bitwise or-ing of a separate bit-long r/w variable, since the r/w was intended to be encapsulated by my saved address.

 

But this does not seem to work the same way without a separate instruction that is clearing the LSB and bitwise or-ing the R/W bit.

 

So to (hopefully) clarify: Does the SMBus hardware require that extra instruction to shift in the LSB (the R/W bit) of the slave address?

Posts: 8,022
Registered: ‎08-13-2003

Re: C8051F568: SMBus R/W bit importance

So to (hopefully) clarify: Does the SMBus hardware require that extra instruction to shift in the LSB (the R/W bit) of the slave address?

 

no, best guess somewhere in the code you are bastardizing there is a shift of the device address

erik
Posts: 2,892
Registered: ‎02-07-2002

Re: C8051F568: SMBus R/W bit importance

Why not just show the piece of code you're talking about? Copy-paste it using the Insert Code button.

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Posts: 25
Registered: ‎03-03-2017

Re: C8051F568: SMBus R/W bit importance


erikm wrote:

So to (hopefully) clarify: Does the SMBus hardware require that extra instruction to shift in the LSB (the R/W bit) of the slave address?

 

no, best guess somewhere in the code you are bastardizing there is a shift of the device address


You were right; it was a combination of adding additional functionality, and missing an important piece of how the example program is laid out. Everything seems to work now.