I2C Pull-up resistor calculation

by <a href="http://community.silabs.com/t5/Welcome-and-Announcements/Community-Ranking-System-and-Recognition-Program/m-p/140490#U140490"><font color="#000000"><font size="2">Hero Employee</font></font> </a> BrianL on ‎06-09-2017 05:24 PM

This appnote describes how to calculate the pull-up resistors for a particular I2C bus: http://www.ti.com/lit/an/slva689/slva689.pdf

 

Minimum Pull-up Resistance

 

The minimum resistance is pretty easy to determine, and is based on the bus voltage (Vbus), the maximum voltage that can be read as a logic-low (VOL), and the maximum current that the pins can sink when at or below VOL (IOL).

 

The formula is:

 

Rp(min) = (Vbus – VOL) / IOL

 

Formula 1. Minimum Pull-up Resistance

 

As an example, we will use an EFM8LB1 MCU, operating at VIO = 3.3V with an I2C speed of 400 kHz (fast mode), for the I2C bus characteristics. The EFM8LB1 datasheet is here: https://www.silabs.com/documents/public/data-sheets/efm8lb1-datasheet.pdf

 

For the LB1, VIL is 0.3 * VIO, which would be 0.99 V. This is the maximum voltage that will be registered by the LB1 as a logic low. In high-drive mode, the pins can also sink up to 13.5 mA while retaining a voltage of at most 0.6V, which is below the VIL threshold, so we can use that as the input for IOL.

 

  • Rp(min) = (3.3V – 0.99V ) / 13.5mA = 171 Ohms

 

This is the minimum pull-up resistance for an I2C bus composed of EFM8LB1 devices. Lower than this, and we cannot guarantee that the device can pull the I2C bus lines below VOL.

 

Maximum Pull-up Resistance

 

The maximum pull-up resistance is based on the needed rise-time of the clock (dependent on the I2C clock frequency), and the total capacitance on the bus.

 

The I2C specification (http://cache.nxp.com/documents/user_manual/UM10204.pdf) lists the maximum total bus capacitance with a pull-up resistor to be 200 pF (it can be up to 400 pF if the pull-up is a current source, section 5.1).

 

This specification also describes the rise-time of SDA/SCL to be a maximum of 300 ns in “Fast-mode” – 400 kHz (table 10).

 

Back to the appnote: the formula for calculating the maximum pull-up resistance is:

 

Rp(min) = rt / ( 0.8473 * C)

 

Formula 2. Maximum Pull-up Resistance

 

Where rt is the maximum allowed rise-time of the bus, and Cb is the total bus capacitance.

 

The appnote actually already calculated this for the worst-case Fast Mode ( 300 ns / 0.8473 * 200 pF), to be 1.77 k Ohms. These pull-ups would draw 3.3V / 1.77 k  = 1.86 mA each when SCL / SDA is low.

 

So, theoretically, if this bus has the absolute maximum amount of capacitance on it, this bus should use at least 1.77 k Ohm pull-up resistors, down to 171 Ohm resistors if their maximum low drive strength is 13.5 mA each during SCL/SDA low.

 

Ideally, the bus capacitance should be lower than the I2C maximum specification, so the formula may give you a higher resistance than this theoretical worst case.