OVTDIS Impact on Absolute Maximum I/O Pin Voltage

by <a href="http://community.silabs.com/t5/Welcome-and-Announcements/Community-Ranking-System-and-Recognition-Program/m-p/140490#U140490"><font color="#000000"><font size="2">Hero Employee</font></font> </a> JohnB on ‎06-19-2017 11:05 AM


Does a bit set in a port's OVTDIS register disconnect the corresponing I/O pin's clamping diodes from the supply rail? If so, does that affect the absolute maximum input voltage rating for the pin?


The answer is yes in both cases.


On EFM32 Series 1 and EFR32 devices, any GPIO pin for which the corresponding OVTDIS bit is set should be considered to have an absolute maximum input voltage of IOVDD + 0.3V.


Raising the pin above this voltage will drastically increase its leakage current and is not safe for long-term reliable operation.