Does the RAMPOWERDOWN bit field in EMU_RAM0CTRL only take effect when entering EM2 or EM3, or does it take effect immediately in any energy mode? In other words, can some of the RAM be shut off in any energy mode to conserve power?
This is a question well worth investigating. If your application can be structured in such a way that RAM is only powered when needed, why not disable unused banks to further optimize your system's overall energy usage.
At first blush, it appears that there might be something to this. Here's a dump of RAM on a Pearl Gecko device around address 0x20001000 with RAMPOWERDOWN = 0. All blocks are enabled, and we can see the words at 0x20001000 and 0x20001004, which are the first and second words of the second 4 KB block of RAM, hold 0xFFFFFFFF and 0x11112222, respectively.
So, now let's write RAMPOWERDOWN to 0xF, which disables all RAM blocks except for the first 4 KB from 0x20000000 to 0x20000FFF. We'll force Simplicity Studio to refresh the Memory View by writing 0x33334444 to the word at 0x20001004:
Lo' and behold, it looks like the RAM blocks starting at 0x20001000 are now powered down! No data is showing and trying to write 0x33334444 to address 0x20001004 had no effect.
Alas, this is not the case. The now inaccessible RAM blocks, in fact, remain powered, as we can see by writing RAMPOWERDOWN back to 0 and writing 0x33334444 to 0x20001004 to refresh the display:
If the RAM blocks were getting powered off, the locations shown above shouldn't retain the values previously written to them. What's actually happening in EM0 and EM1 because it certainly looks like something's getting disabled when 0xF is written to RAMPOWERDOWN?
As is common in digital logic design, enable signals for memories, analog blocks, and digital logic are generally qualified by more than one input. For example, an on-chip analog-to-digital converter might not perform conversions if its reference is not powered up because the conversion start signal is qualified with a signal that indicates that the reference is powered and ready.
Because RAMPOWERDOWN is intended to take effect in EM2 and EM3, it should come as no surprise that the enable signals for the blocks that can be powered down are qualified by an indication that the CPU is in sleep mode.
This can be tested by running the attached simple project on a Pearl Gecko 1 Starter Kit (SLSTK3401A). All the code does is show the contents of RAM locations 0x20001000 and 0x20001004 discussed above before and after entering EM2.
Note that the code must be run on the Starter Kit (STK) while it is powered from a battery, and the switch next to the battery is in the BAT (left) position. The code will not work as expected if the STK remains connected with the debugger running because when debug is active, the MCU never truly enters EM2 or EM3. Instead it remains in a kind of modified EM1, which, as noted above, means that none of the RAM blocks is ever powered down.
As the picture above shows, the RAM contents are not preserved after exit from EM2, demonstrating that the selected blocks are, in fact, powered down.
To run the test code, download the attachment and import it into Simplicity Studio using the following procedure:
Note that while this code is written for the Pearl Gecko STK, it will run unmodified, if inserted into a new project, on the majority of Blue, Flex, and Mighty Gecko radio boards connected to the Wireless STK motherboard. The same explanation above regarding RAMPOWERDOWN behavior applies to these devices.
Across the board, this information applies to all EFM32 Series 1 and EFR32 devices with the sole difference being the RAM blocks that are powered down in EM2 and EM3 (made inaccessible in EM0 and EM1) or that remain active. The reference manual description of the EMU_RAM0CTRL register details which blocks are affected by the RAMPOWERDOWN bit field for a given device.