The EFM32LG datasheet specifies DNL_DAC ("Differential non-linearity") as +/- 1 LSB (typical), but provides no max or min values. Therefore, in the typical case the DAC is monotonic.
Is DAC monotonicity guaranteed? This is possible even if maximum DNL skews higher than +1LSB.
Expected mismatch among the resistive elements that comprise the DAC results in a monotonic DAC, but it is statistically possible for there to exist a DAC step where this is not the case.
Hence, the EFM32LG DAC is not guaranteed to be monotonic.