This is the USB configuration for self powered mode for an EFM32 device -
Problem - If USB insertion occurs before VDD is powered up
In self-powered mode, the chip is powered from an external USB 5V supply. This means that there is the potential for the 5V to be present on the device pins when the AVDD is at 0 V. This would damage the device since the IO pins will have a voltage that exceeds VDD + 0.3 V.
The USB I/O pins (USB D+/D- etc) are tied to:
1. The typical GPIO pad drivers which are powered from IOVDD
2. Some analog drivers specific to USB which are powered from VREGO
The USB PHY is expecting the MCU to be up and running (i.e., VDD=AVDD=IOVDD are valid) before the USB PHY is powered (or at least at the same time). If USB PHY is powered up while VDD=AVDD=IOVDD is low (e.g., Self-powered case), there is a possibility the USB PHY’s analog drivers could begin driving a voltage on the USB IO pads. This would be violating the VDD+0.3V absolute maximum specification on the IO pad.
There are a couple of workarounds available to address this issue:
1. A PFET switch could be added between the USB_VBUS pin and the USB jack VBUS 5V supply. The gate of this switch would be controlled by VDD, such that when VDD=0V the switch was open and when VDD>1.8V the switch was closed
2. Another option could be to not use the LDO in the self-powered case. For example, tying VDD=AVDD=IOVDD=USB_VREGI=USB_VREGO. In this case, it wouldn’t be possible for the USB_VREGO to exceed IOVDD.